No. | parte # | Fabricante | Descripción | Hoja de Datos |
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ETC |
Data Travo Flyback |
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Panasonic |
Silicon MOS FET AC input detecting function By connecting SO terminal, it is able to select functions as below: 1) Boot up and stop operation according to AC input or output (shortcircuit SO teminal to VDD terminal) 2) Signal output form SO terminal when AC input |
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Winsonic |
11b/g/n WLAN and Bluetooth v2.1 / 3.0 / 4.0 single chip solution General Complies with PCI Express Base Specification Revision 1.1 for WLAN Complies with USB 1.1 Specification Revision 1.1 for Bluetooth. Form factor: Half-Mini card. Bus Interface: Wi-Fi: PCIe bus interface. BT: USB bus interface. Win |
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SeCoS |
Dual-N Enhancement Mode Power MOSFET 20V/760mA RDS(ON)≦450mΩ@VGS=4.5V RDS(ON)≦650mΩ@VGS=2.5V RDS(ON)≦1300mΩ@VGS=1.8V Reliable and Rugged Green Device Available ESD Protection MARKING 20K SOT-363 A E L B F C H DG K J PACKAGE INFORMATION Package MPQ SOT-363 3K Leader |
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Texas Instruments |
Adjustable Frequency Synchronous Buck Regulator 1 •2 Input Voltage Range 2.95V to 5.5V • Accurate Current Limit Minimizes Inductor Size • 97% Peak Efficiency • Adjustable Switching Frequency (250 kHz to 750 kHz) • 16mΩ and 20mΩ Integrated FET Switches • Starts up into Pre-biased Loads • Output Vol |
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HeTai |
HYBRID STEPPING MOTOR |
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ElecSuper |
N-channel MOSFET 20V, RDS(ON)=125mΩ(Typ.) @ VGS=4.5V RDS(ON)=190mΩ(Typ.) @VGS=2.5V High density cell design for low RDS(on) Material: Halogen free Reliable and rugged Avalanche Rated Low leakage current 3. Applications PWM applications Load switch |
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Integrated Circuit Solution Inc |
VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN ◆ Integrated SAW delay line; Output of 15 to 700 MHz * ◆ Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz) ◆ LVPECL clock output (CML and LVDS options available) ◆ Pin-selectable PLL divider ratios support FEC ratios • M2080/85 |
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Integrated Circuit Solution Inc |
VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN ◆ Integrated SAW delay line; Output of 15 to 700 MHz * ◆ Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz) ◆ LVPECL clock output (CML and LVDS options available) ◆ Pin-selectable PLL divider ratios support FEC ratios • M2080/85 |
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ADV |
N-Channel MOSFET Test conditions On/off Characteristics BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current VGS(th) IGSS RDS(ON) gFS Gate Threshold Voltage Gate Leakage Current Drain-SourceOn-stateResistance⑵ Forward transconductance⑵ |
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ADV |
N-Channel MOSFET r Test conditions On/off Characteristics BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current VGS(th) IGSS RDS(ON) gFS Gate Threshold Voltage Gate Leakage Current Drain-SourceOn-stateResistance⑵ Forward transconductance⑵ |
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Will Semiconductor |
N-Channel MOSFET z Trench Technology z Supper high density cell design z Excellent ON resistance for higher DC current z Extremely Low Threshold Voltage z Small package SOT-23 SOT-23 D 3 12 GS Configuration (Top View) 3 WT6* 12 WT6 * = Device Code = Month (A~Z) |
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ETC |
VOLTAGE CONTROLLED AMPLIFIER |
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Anpec Electronics Coropration |
N-Channel MOSFET • • • • 20V/6A , RDS(ON)=35mΩ(typ.) @ VGS=4.5V RDS(ON)=38mΩ(typ.) @ VGS=2.5V Super High Dense Cell Design for Extremely Low RDS(ON) Reliable and Rugged TO-252 Package Pin Description 1 2 3 G D S Applications • Power Management in Computer, Po |
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Anpec Electronics Coropration |
N-Channel MOSFET • 20V/20A, RDS(ON)=35mΩ (typ.) @ VGS=10V RDS(ON)=45mΩ (typ.) @ VGS=4.5V RDS(ON)=110mΩ (typ.) @ VGS=2.5V Pin Description G D S • • • Super High Dense Cell Design Reliable and Rugged Lead Free Available (RoHS Compliant) Top View of TO-252 D Appli |
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Anpec Electronics Coropration |
N-Channel MOSFET • • • • 20V/6A, RDS(ON)=35mΩ(typ.) @ VGS=10V RDS(ON)=45mΩ(typ.) @ VGS=4.5V Super High Dense Cell Design High Power and Current Handling Capability TO-252, SOT-89 and SOT-223 Packages Pin Description G G D S D S Top View of TO-252 Top View of SO |
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CET |
Dual N-Channel Enhancement Mode Field Effect Transistor 20V, 11A, RDS(ON) = 12mΩ @VGS = 4.5V. RDS(ON) = 18mΩ @VGS = 2.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. D D 7 D 6 D 5 5 Lead free product is acquired. Surface mount Package. 8 SO-8 1 1 |
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SMSC Corporation |
Low Cost ARCNET (ANSI 878.1) Controller • • • • • • • • • • • New Features Data Rates up to 312.5 Kbps Programmable Reconfiguration Times 24 Pin DIP, 28 Pin PLCC, 48 Pin TQFP Packages Ideal for Industrial/Factory/Building Automation and Transportation Applications Deterministic, (ANSI 878. |
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Advanced Power Technology |
MOSFET Power Module · Power MOS 7® MOSFETs - Low RDSon - Low input and Miller capacitance - Low gate charge - Fast intrinsic reverse diode - Avalanche energy rated - Very rugged Kelvin source for easy drive Very low stray inductance - Symmetrical design - M5 power conne |
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Advanced Power Technology |
MOSFET Power Module · Power MOS 7® MOSFETs - Low RDSon - Low input and Miller capacitance - Low gate charge - Avalanche energy rated - Very rugged · Kelvin source for easy drive · Very low stray inductance - Symmetrical design - Lead frames for power connections · Inter |
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