| No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Cypress Semiconductor |
High-Performance LVDS Oscillator ■ Low-jitter crystal oscillator (XO) ■ Less than 1 ps typical root mean square (RMS) phase jitter ■ Low-voltage differential signaling (LVDS) output ■ Output frequency from 50 MHz to 690 MHz ■ Factory-configured or field-programmable ■ Integrated pha |
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Cypress Semiconductor |
312.5 MHz LVPECL Clock Generator ■ One LVPECL output pair ■ Output frequency: 312.5 MHz ■ External crystal frequency: 25 MHz ■ Low RMS phase jitter at 312.5 MHz, using 25-MHz crystal (1.875 MHz to 20 MHz): 0.3 ps (typical) ■ Pb-free 8-pin TSSOP package ■ Supply voltage: 3.3 V or 2.5 |
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Cypress Semiconductor |
1:4 LVCMOS to LVPECL Fanout Buffer ■ Select one of two low-voltage complementary metal oxide semiconductor (LVCMOS) inputs to distribute to four low-voltage positive emitter-coupled logic (LVPECL) output pairs ■ 30-ps maximum output-to-output skew ■ 480-ps maximum propagation delay ■ |
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Cypress Semiconductor |
Phase-Aligned Clock Multiplier ■ 10 MHz to 166.67 MHz output operating range ■ Four-multiplier configuration ■ Single PLL architecture ■ Phase aligned outputs ■ Low jitter, high accuracy outputs ■ Output enable pin ■ 3.3 V operation ■ 5 V tolerant input ■ Internal loop filter ■ 8- |
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Cypress Semiconductor |
Programmable High Frequency Crystal Oscillator ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Benefits ■ Crystal Oscillator with Spread Spectrum Clock (SSXO) No Spread Spectrum (XO) Option Wide operating output clock frequency range of 10 –166 MHz Programmable spread spectrum with nominal 31.5 kHz modulation freq |
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Cypress Semiconductor |
High Performance CMOS Oscillator ■ ■ ■ ■ ■ ■ ■ ■ ■ Functional Description The CY2XF32 is a high performance and high frequency crystal oscillator (XO). It uses a Cypress proprietary low noise PLL to synthesize the frequency from an integrated crystal. The output frequency can be ch |
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Cypress Semiconductor |
Dual 1:10 Differential Clock / Data Fanout Buffer • Two sets of ten ECL/PECL differential outputs • Two ECL/PECL differential inputs • Hot-swappable/-insertable • 50 ps output-to-output skew • 150 ps device-to-device skew • 500 ps propagation delay (typical) • 1.5 GHz Operation (2.7 GHz max. toggle |
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Cypress Semiconductor |
Low-Jitter LVPECL Crystal Oscillator ■ Low-jitter crystal oscillator (XO) ■ Less than 1 ps typical root mean square (RMS) phase jitter ■ Low-voltage positive emitter coupled logic (LVPECL) output ■ Output frequency from 50 MHz to 690 MHz ■ Factory-configured or field-programmable ■ Inte |
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Cypress Semiconductor |
1:12 Clock Distribution Buffer ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Description The CY29948 is a low-voltage 200-MHz clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock. The two clock sources can be used to provide for a |
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Cypress Semiconductor |
Factory Programmable Quad PLL Clock Generator ■ Fully integrated phase-locked loops (PLLs) ■ Small quad flat no-leads (QFN) package option ❐ 40% smaller than 20-pin TSSOP ❐ 22% smaller than 16-pin TSSOP ■ Selectable output frequency ■ Programmable output frequencies ■ Output frequency range: ❐ 1 |
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Cypress Semiconductor |
Low-Jitter LVPECL Crystal Oscillator ■ Low-jitter crystal oscillator (XO) ■ Less than 1 ps typical root mean square (RMS) phase jitter ■ Low-voltage positive emitter coupled logic (LVPECL) output ■ Output frequency from 50 MHz to 690 MHz ■ Factory-configured or field-programmable ■ Inte |
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Cypress Semiconductor |
Clock Generator ■ Meets Rambus Extended Data Rate (XDR™) clocking requirements ■ 25 ps typical cycle-to-cycle jitter ❐ 135 dBc/Hz typical phase noise at 20 MHz offset ■ 100 or 133 MHz differential clock input ■ 300 –800 MHz high speed clock support ■ Quad (open dra |
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Cypress Semiconductor |
1:4 Clock Fanout Buffer • • • • Low-voltage operation VDD = 3.3V 1:4 Fanout Single-input configurable for — LVDS, LVPECL, or LVTTL — Four differential pairs of LVDS outputs Drives 50- or 100-ohm load (selectable) Low input capacitance Low output skew Does not exceed Bellcor |
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Cypress Semiconductor |
PECL/CMOS Buffer • • • • • • • • • • • • • DC to 320-MHz operation 50-ps output-output skew 30-ps cycle-cycle jitter 2.5V power supply LVPECL input @ 320-MHz Operation One LVPECL output @ 320-MHz Operation Four LVCMOS/LVTTL outputs @ 250 MHz/160 MHz Two LVCMOS/LVTTL |
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Cypress Semiconductor |
Differential Fanout Buffer • Fifteen ECL/PECL differential outputs grouped in four banks • Two ECL/PECLdifferential inputs • Hot-swappable/-insertable • 50-ps output-to-output skew • < 200-ps device-to-device skew • Less than 2-pS intrinsic jitter • < 500-ps propagation delay |
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Cypress Semiconductor |
Single-PLL General-Purpose EPROM Programmable Clock Generator Single phase-locked loop architecture EPROM programmability Benefits Generates a custom frequency from an external source Easy customization and fast turnaround Factory-programmable (CY2071A, CY2071AI) or field- Programming support available for all |
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Cypress Semiconductor |
Three-PLL General Purpose EPROM Programmable Clock Generator ■ Three integrated phase-locked loops ■ EPROM programmability ■ Factory-programmable (CY2291) or field-programmable (CY2291F) device options ■ Low-skew, low-jitter, high-accuracy outputs ■ Power-management options (Shutdown, OE, Suspend) ■ Frequency |
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Cypress Semiconductor |
FTG for Pentium 4 and Intel 845 Series Chipset • Compatible with Intel® CK-Titan and CK-408 Clock Synthesizer/Driver specifications • System frequency synthesizer for Intel Brookdale 845 and Brookdale – G Pentium 4® chipsets • Programmable clock output frequency with less than 1-MHz increment • I |
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Cypress Semiconductor |
1:2 CML Fanout Buffer ■ One current mode logic (CML), High-speed current steering logic (HCSL), or low-voltage positive emitter-coupled logic (LVPECL) input pair distributed to two CML output pairs ■ 20-ps maximum output-to-output skew ■ 480-ps maximum propagation delay ■ |
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Cypress Semiconductor |
Flash-Programmable Clock Generator Advanced Features ■ Three integrated phase-locked loops (PLLs) ■ Ultra wide divide counters (8-bit Q, 11-bit P, and 7-bit post divide) ■ Improved linear crystal load capacitors ■ Flash programmability with external programmer ■ Field-programmable ■ |
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Desde 2024. D4U Semiconductor.
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