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Cypress CY2 DataSheet

No. parte # Fabricante Descripción Hoja de Datos
1
CY2X013

Cypress Semiconductor
High-Performance LVDS Oscillator

■ Low-jitter crystal oscillator (XO)
■ Less than 1 ps typical root mean square (RMS) phase jitter
■ Low-voltage differential signaling (LVDS) output
■ Output frequency from 50 MHz to 690 MHz
■ Factory-configured or field-programmable
■ Integrated pha
Datasheet
2
CY2XP311

Cypress Semiconductor
312.5 MHz LVPECL Clock Generator

■ One LVPECL output pair
■ Output frequency: 312.5 MHz
■ External crystal frequency: 25 MHz
■ Low RMS phase jitter at 312.5 MHz, using 25-MHz crystal (1.875 MHz to 20 MHz): 0.3 ps (typical)
■ Pb-free 8-pin TSSOP package
■ Supply voltage: 3.3 V or 2.5
Datasheet
3
CY2CP1504

Cypress Semiconductor
1:4 LVCMOS to LVPECL Fanout Buffer

■ Select one of two low-voltage complementary metal oxide semiconductor (LVCMOS) inputs to distribute to four low-voltage positive emitter-coupled logic (LVPECL) output pairs
■ 30-ps maximum output-to-output skew
■ 480-ps maximum propagation delay
Datasheet
4
CY2300

Cypress Semiconductor
Phase-Aligned Clock Multiplier

■ 10 MHz to 166.67 MHz output operating range
■ Four-multiplier configuration
■ Single PLL architecture
■ Phase aligned outputs
■ Low jitter, high accuracy outputs
■ Output enable pin
■ 3.3 V operation
■ 5 V tolerant input
■ Internal loop filter
■ 8-
Datasheet
5
CY25701

Cypress Semiconductor
Programmable High Frequency Crystal Oscillator














■ Benefits
■ Crystal Oscillator with Spread Spectrum Clock (SSXO) No Spread Spectrum (XO) Option Wide operating output clock frequency range of 10
  –166 MHz Programmable spread spectrum with nominal 31.5 kHz modulation freq
Datasheet
6
CY2XF32

Cypress Semiconductor
High Performance CMOS Oscillator









■ Functional Description The CY2XF32 is a high performance and high frequency crystal oscillator (XO). It uses a Cypress proprietary low noise PLL to synthesize the frequency from an integrated crystal. The output frequency can be ch
Datasheet
7
CY2PP3220

Cypress Semiconductor
Dual 1:10 Differential Clock / Data Fanout Buffer

• Two sets of ten ECL/PECL differential outputs
• Two ECL/PECL differential inputs
• Hot-swappable/-insertable
• 50 ps output-to-output skew
• 150 ps device-to-device skew
• 500 ps propagation delay (typical)
• 1.5 GHz Operation (2.7 GHz max. toggle
Datasheet
8
CY2X014

Cypress Semiconductor
Low-Jitter LVPECL Crystal Oscillator

■ Low-jitter crystal oscillator (XO)
■ Less than 1 ps typical root mean square (RMS) phase jitter
■ Low-voltage positive emitter coupled logic (LVPECL) output
■ Output frequency from 50 MHz to 690 MHz
■ Factory-configured or field-programmable
■ Inte
Datasheet
9
CY29948

Cypress Semiconductor
1:12 Clock Distribution Buffer











■ Description The CY29948 is a low-voltage 200-MHz clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock. The two clock sources can be used to provide for a
Datasheet
10
CY22389

Cypress Semiconductor
Factory Programmable Quad PLL Clock Generator

■ Fully integrated phase-locked loops (PLLs)
■ Small quad flat no-leads (QFN) package option
❐ 40% smaller than 20-pin TSSOP
❐ 22% smaller than 16-pin TSSOP
■ Selectable output frequency
■ Programmable output frequencies
■ Output frequency range:
❐ 1
Datasheet
11
CY2X0147

Cypress Semiconductor
Low-Jitter LVPECL Crystal Oscillator

■ Low-jitter crystal oscillator (XO)
■ Less than 1 ps typical root mean square (RMS) phase jitter
■ Low-voltage positive emitter coupled logic (LVPECL) output
■ Output frequency from 50 MHz to 690 MHz
■ Factory-configured or field-programmable
■ Inte
Datasheet
12
CY2308

Cypress
3.3V Zero Delay Buffer

■ Zero input-output propagation delay, adjustable by capacitive load on FBK input
■ Multiple configurations, see Available CY2308 Configurations on page 4 for more details
■ Multiple low skew outputs
■ Two banks of four outputs, three-stateable by tw
Datasheet
13
CY24271

Cypress Semiconductor
Clock Generator

■ Meets Rambus Extended Data Rate (XDR™) clocking requirements
■ 25 ps typical cycle-to-cycle jitter
❐ 135 dBc/Hz typical phase noise at 20 MHz offset
■ 100 or 133 MHz differential clock input
■ 300
  –800 MHz high speed clock support
■ Quad (open dra
Datasheet
14
CY28322-2

Cypress
133 Mhz Spread Spectrum Clock Synthesizer with Differential CPU Outputs

• Compliant with Intel CK-Titan and CK-408 clock synthesizer/driver specifications
• Multiple output clocks at different frequencies — Two pairs of differential CPU outputs, up to 200 MHz — Nine synchronous PCI clocks, three free-running — Six 3V66 c
Datasheet
15
CY2DL814

Cypress Semiconductor
1:4 Clock Fanout Buffer




• Low-voltage operation VDD = 3.3V 1:4 Fanout Single-input configurable for — LVDS, LVPECL, or LVTTL — Four differential pairs of LVDS outputs Drives 50- or 100-ohm load (selectable) Low input capacitance Low output skew Does not exceed Bellcor
Datasheet
16
CY2PD817

Cypress Semiconductor
PECL/CMOS Buffer













• DC to 320-MHz operation 50-ps output-output skew 30-ps cycle-cycle jitter 2.5V power supply LVPECL input @ 320-MHz Operation One LVPECL output @ 320-MHz Operation Four LVCMOS/LVTTL outputs @ 250 MHz/160 MHz Two LVCMOS/LVTTL
Datasheet
17
CY2PP3115

Cypress Semiconductor
Differential Fanout Buffer

• Fifteen ECL/PECL differential outputs grouped in four banks
• Two ECL/PECLdifferential inputs
• Hot-swappable/-insertable
• 50-ps output-to-output skew
• < 200-ps device-to-device skew
• Less than 2-pS intrinsic jitter
• < 500-ps propagation delay
Datasheet
18
CY2DP814

Cypress
1:4 Clock Fanout Buffer

■ Low-voltage operation
■ VDD = 3.3 V
■ 1:4 fanout
■ Single input configurable for LVDS, LVPECL, or LVTTL
■ Four differential pairs of LVPECL outputs
■ Drives 50-ohm load
■ Low input capacitance
■ Less than 4 ns typical propagation delay
■ 85 ps typi
Datasheet
19
CY2DP1510

Cypress
1:10 LVPECL Fanout Buffer

■ Select one of two differential (LVPECL, LVDS, HCSL, or CML) input pairs to distribute to 10 LVPECL output pairs
■ Translates any single-ended input signal to 3.3 V LVPECL levels with resistor bias on INx# input
■ 40-ps maximum output-to-output skew
Datasheet
20
CY2071A

Cypress Semiconductor
Single-PLL General-Purpose EPROM Programmable Clock Generator
Single phase-locked loop architecture EPROM programmability Benefits Generates a custom frequency from an external source Easy customization and fast turnaround Factory-programmable (CY2071A, CY2071AI) or field- Programming support available for all
Datasheet



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