No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Austin Semiconductor |
32K x 32 EEPROM • • • • • • Access times of 90, 120, 150 ns Built in decoupling caps for low noise operation Organized as 32K x 32; User configurable as 64K x 16 or 128K x 8 Operation with single 5 volt supply Low power CMOS TTL Compatible Inputs and Outputs OPTION |
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Austin Semiconductor |
128K x 32 FLASH FLASH MEMORY ARRAY I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 GND I/O 8 I/O 9 I/O 10 I/O 11 I/O 12 I/O 13 I/O 14 I/O 15 Vcc A11 A12 A13 A14 A15 A16 CS1\ OE CS2\ NC WE2\ WE3\ WE4\ NC NC NC I/O 16 I/O 17 I/O 18 I/O 19 I/O 20 I/O 21 I/O 22 I/O 23 GND I/O 24 I/O 25 |
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Austin Semiconductor |
512K x 32 Module nvSRAM 3.3V High Speed SRAM with Non-Volatile Storage • -55oC to 125oC Operation • True non-volatile SRAM (no batteries) • 20 ns, 25 ns, and 45 ns access times • Automatic STORE on power down with only a small • • • • • • • capacitor STORE to QuantumTrap® nonvolatile elements initiated by software, devi |
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Austin Semiconductor |
128K x 32 Radiation Tolerant EEPROM • Access time of 150ns, 200ns, 250ns • Operation with single 5V + 10% supply • Power Dissipation: Active: 1.43 W (MAX), Max Speed Operation Standby: 7.7 mW (MAX), Battery Back-up Mode • Automatic Byte Write: 10 ms (MAX) • Automatic Page Write (128 by |
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Austin Semiconductor |
3.0Volt Boot Block FLASH Array • • • • • • • • • • • • • • 32Mb device, total density, organized as 1M x 32 Bottom Boot Block (Sector) Architecture Operation with single 3.0V Supply Available in multiple Access time variations Individual byte control via individual byte selects (C |
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Austin Semiconductor |
128K x 32 EEPROM • Access times of 120, 140, 150, 200, 250, and 300 ns • Built in decoupling caps for low noise operation • Organized as 128K x32; User configurable as 256K x16 or 512K x8 • Operation with single 5 volt supply • Low power CMOS • TTL Compatible Inputs |
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Austin Semiconductor |
512K x 8 EEPROM • Access times of 150, 200, 250, and 300 ns • JEDEC Compatible Pinout • 10,000 Write Endurance Cycles • 10 year Data Retention • Organized as 512Kx8 • Operation with single 5 volt supply • Low power CMOS • TTL Compatible Inputs and Outputs OPTIONS • |
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Austin Semiconductor |
512K x 32 SRAM SRAM MEMORY ARRAY • Operation with single 5V supply • High speed: 12, 15, 17, 20, 25 and 35ns • Built in decoupling caps for low noise • Organized as 512Kx32 , byte selectable • Low power CMOS • TTL Compatible Inputs and Outputs • Future offerings 3.3V Power Supply O |
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Austin Semiconductor |
512K x 32 FLASH FLASH MEMORY ARRAY • Access times of 15, 17, 20, 25, 35, and 45 ns • Built in decoupling caps for low noise operation • Organized as 128K x32; User configured as 256Kx16 or 512K x8 • Operation with single 5 volt supply • Low power CMOS • TTL Compatible Inputs and Outpu |
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Austin Semiconductor |
128K x 32 SRAM SRAM MEMORY ARRAY • Access times of 15, 17, 20, 25, 35, and 45 ns • Built in decoupling caps for low noise operation • Organized as 128K x32; User configured as 256Kx16 or 512K x8 • Operation with single 5 volt supply • Low power CMOS • TTL Compatible Inputs and Outpu |
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Austin Semiconductor |
512K x 32 SRAM SRAM MEMORY ARRAY • Operating Temperature Ranges Military (-55oC to +125oC) Industrial (-40oC to +85oC) • Timing 12ns 15ns 17ns 20ns 25ns 35ns 45ns 55ns • Package Ceramic Quad Flatpack Ceramic Quad Flatpack Pin Grid Array • Low Power Data Retention Mode • Pinout Mili |
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Austin Semiconductor |
2M x 32 FLASH FLASH MEMORY MODULE • Fast access times of 90ns, 120ns, and 150ns • 5.0V ±10%, single power supply operation • Low power consumption(TYP): 4µA CMOS stand-by * TYP ICC(active) <120mA for READ/WRITE • 20 year DATA RETENTION • Minimum 1,000,000 Program/Erase Cycles per se |
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Austin Semiconductor |
1M x 32 FLASH FLASH MEMORY MODULE • Fast access times of 90ns, 120ns, and 150ns • 5.0V ±10%, single power supply operation • Low power consumption typical: 4µA typical CMOS stand-by * ICC(active) <120mA for READ/WRITE • 20 year DATA RETENTION at 125oC • 1,000,000 program/erase cycles |
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Austin Semiconductor |
3.3Volt Boot Block FLASH Array • • • • • • • • • • • • • • • 64Mb device, total density, organized as 2M x 32 Bottom Boot Block (Sector) Architecture (Contact factory for top boot) Operation with single 3.0V Supply Available in multiple Access time variations Individual byte contr |
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Austin Semiconductor |
512K x 32 Module nvSRAM 5.0V High Speed SRAM with Non-Volatile Storage • -55oC to 125oC Operation • True non-volatile SRAM (no batteries) • 20 ns, 25 ns, and 45 ns access times • Automatic STORE on power down with only a small • • • • • • • capacitor STORE to QuantumTrap® nonvolatile elements initiated by software, devi |
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Austin Semiconductor |
High Speed Static RAM Integrated Plastic Encapsulated Microcircuit DESCRIPTION The AS8S512K32 is a high speed, 5V, 16Mb SRAM. The device is available with access times of 12, 15, 20 and 25ns creating a zero wait state/latency, real-time memory solution. The high speed, 5v supply voltage and control lines,make the |
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Austin Semiconductor |
128K x 32 SRAM SRAM MEMORY ARRAY • • • • • • Fast Access Times of 10 to 25ns Overall Configuration: 128K x 32 4 Low Power CMOS 128K x 8 SRAMs in one MCM +3.3V power supply Internal Decoupling Capacitors Low Operating Power, 1/2 Previous Generation OPTIONS • Operating Temperature Ra |
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Austin Semiconductor |
512K x 32 SRAM SRAM Memory Array MCM • • • • • • • • • Fast access times: 10, 12, 15, 17 and 20ns Fast OE\ access times: 6ns Ultra-low operating power < 1W worst case Single +3.3V ±0.3V power supply Fully static -- no clock or timing strobes necessary All inputs and outputs are TTL-comp |
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Austin Semiconductor |
High Speed Static RAM Integrated Plastic Encapsulated Microcircuit DESCRIPTION The AS8SLC512K32 is a high speed, 3.3V, 16Mb SRAM. The device is available with access times of 12, 15, 20 and 25ns creating a zero wait state/latency, real-time memory solution. The high speed, 3.3V supply voltage and control lines,ma |
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Austin Semiconductor |
128K x 16 SRAM & 512K x 16 FLASH SRAM / FLASH MEMORY ARRAY • Operation with single 5V supply • High speed: 35ns SRAM, 90ns FLASH • Built in decoupling caps and multiple ground pins for low noise • Organized as 128K x 16 SRAM and 512K x 16 FLASH • Low power CMOS • TTL Compatible Inputs and Outputs • Both bloc |
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