No. | parte # | Fabricante | Descripción | Hoja de Datos |
---|---|---|---|---|
|
|
Analog Devices |
Operation and Applications of the AD654 IC V to F Converter |
|
|
|
Analog Devices |
Universal LVDT Signal Conditioner Single Chip Solution, Contains Internal Oscillator and Voltage Reference No Adjustments Required Interfaces to Half-Bridge, 4-Wire LVDT DC Output Proportional to Position 20 Hz to 20 kHz Frequency Range Unipolar or Bipolar Output Will Also Decode AC |
|
|
|
Analog Devices |
Low Cost Analog Multiplier 4-quadrant multiplication Low cost, 8-lead SOIC and PDIP packages Complete—no external components required Laser-trimmed accuracy and stability Total error within 2% of full scale Differential high impedance X and Y inputs High impedance unity-gain s |
|
|
|
Analog Devices |
Low Cost Monolithic Voltage-to-Frequency Converter Low Cost Single or Dual Supply, 5 V to 36 V, ؎5 V to ؎18 V Full-Scale Frequency Up to 500 kHz Minimum Number of External Components Needed Versatile Input Amplifier Positive or Negative Voltage Modes Negative Current Mode High Input Impedance, Low Dr |
|
|
|
Analog Devices |
4 ~ 20mA Transmitter ► 4 –20 mA, 0 –20 mA output ranges ► Precalibrated input ranges: ► 0 V to 2 V, 0 V to 10 V ► Precision voltage reference ► Programmable to 2.000 V or 10.000 V ► Single or dual supply operation ► Wide power supply range: 4.5 V to 36 V ► Wide output comp |
|
|
|
Analog Devices |
Variable Gain Amplifier Linear-in-dB gain control Pin-programmable gain ranges −11 dB to +31 dB with 90 MHz bandwidth 9 dB to 51 dB with 9 MHz bandwidth Any intermediate range, for example −1 dB to +41 dB with 30 MHz bandwidth Bandwidth independent of variable gain 1.3 nV/√ |
|
|
|
Analog Devices |
150 MSPS Wideband Digital Down-Converter 4/6 independent wideband processing channels Processes 6 wideband carriers (UMTS, CDMA2000) 4 single-ended or 2 LVDS parallel input ports (16 linear bit plus 3-bit exponent) running at 150 MHz Supports 300 MSPS input using external interface logic 3 |
|
|
|
Analog Devices |
Monolithic Synchronous Voltage-to-Frequency Converter Full-scale frequency (up to 2 MHz) set by external system clock Extremely low linearity error (0.005% max at 1 MHz FS, 0.02% max at 2 MHz FS) No critical external components required Accurate 5 V reference voltage Low drift (25 ppm/°C max) Dual- or s |
|
|
|
Analog Devices |
65 MSPS Digital Receive Signal Processor High Input Sample Rate 65 MSPS Single Channel Real 32.5 MSPS Diversity Channel Real 32.5 MSPS Single Channel Complex NCO Frequency Translation Worst Spur Better than –100 dBc Tuning Resolution Better than 0.02 Hz 2nd Order Cascaded Integrator Comb FI |
|
|
|
Analog Devices |
GSM/GPRS Digital Baseband Processor Complete Single Chip Programmable Digital Baseband Processor divided into three main subsystems: Control Processor Subsystem including: ® 32-bit MCU ARM7TDMI Control Processor On-chip System SRAM Memory DSP Subsystem including 16-bit Fixed Point DSP |
|
|
|
Analog Devices |
Dual IF Receiver 11-bit, 200 MSPS output data rate per channel Integrated noise shaping requantizer (NSR) Performance with NSR enabled SNR: 75.5 dBFS in 40 MHz band to 70 MHz @ 185 MSPS SNR: 73.7 dBFS in 60 MHz band to 70 MHz @ 185 MSPS Performance with NSR disabled |
|
|
|
Analog Devices |
Low Power Instrumentation Amplifier Easy to use Gain set with one external resistor (Gain range 1 to 10,000) Wide power supply range (±2.3 V to ±18 V) Higher performance than 3 op amp IA designs Available in 8-lead DIP and SOIC packaging Low power, 1.3 mA max supply current Excellent d |
|
|
|
Analog Devices |
Variable Gain Amplifiers 2 channels with independent gain control Linear in dB gain response 2 gain ranges AD600: 0 dB to 40 dB AD602: –10 dB to +30 dB Accurate absolute gain: ±0.3 dB Low input noise: 1.4 nV/√Hz Low distortion: −60 dBc THD at ±1 V output High bandwidth: dc t |
|
|
|
Analog Devices |
Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem Complete Receiver on a Chip: Monoceiver™ Mixer –15 dBm 1 dB Compression Point –8 dBm Input Third Order Intercept 500 MHz RF and LO Bandwidths Linear IF Amplifier Linear-in-dB Gain Control MGC or AGC with RSSI Output Quadrature Demodulator On-Board Ph |
|
|
|
Analog Devices |
CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator Fully Compliant with IS98A and PCS Specifications CDMA, W-CDMA, AMPS, and TACS Operation Linear IF Amplifier 5.9 dB Noise Figure –47.5 dB to +47 dB Linear-in-dB Gain Control Quadrature Demodulator Demodulates IFs from 50 MHz to 350 MHz Integral Low D |
|
|
|
Analog Devices |
High Common-Mode Voltage Programmable Gain Difference Amplifier High common-mode input voltage range ±120 V at VS = ±15 V Gain range 0.1 to 100 Operating temperature range: −40°C to +85°C Supply voltage range Dual supply: ±2.25 V to ±18 V Single supply: 4.5 V to 36 V Excellent ac and dc performance Offset tempera |
|
|
|
Analog Devices |
Balanced Modulator/Demodulator Recovers Signal from +100 dB Noise 2 MHz Channel Bandwidth 45 V/ s Slew Rate –120 dB Crosstalk @ 1 kHz Pin Programmable Closed Loop Gains of ؎1 and ؎2 0.05% Closed Loop Gain Accuracy and Match 100 V Channel Offset Voltage (AD630BD) 350 kHz Full Pow |
|
|
|
Analog Devices |
40 MSPS/65 MSPS Analog-to-Digital Converter 65 MSPS guaranteed sample rate 40 MSPS version available Sampling jitter < 300 fs 100 dB multitone SFDR 1.3 W power dissipation Differential analog inputs Pin compatible to AD6645 Twos complement digital output format 3.3 V CMOS compatible Data-ready |
|
|
|
Analog Devices |
12-Bit/ 65 MSPS IF Sampling A/D Converter 65 MSPS Minimum Sample Rate 80 dB Spurious-Free Dynamic Range IF-Sampling to 70 MHz 710 mW Power Dissipation Single +5 V Supply On-Chip T/H and Reference Twos Complement Output Format 3.3 V or 5 V CMOS-Compatible Output Levels APPLICATIONS Cellular/P |
|
|
|
Analog Devices |
Low Cost Instrumentation Amplifier Easy to use Rail-to-rail output swing Input voltage range extends 150 mV below ground (single supply) Low power, 550 µA maximum quiescent current Gain set with one external resistor Gain range: 1 to 1000 High accuracy dc performance 0.10% gain error |
|