No. | parte # | Fabricante | Descripción | Hoja de Datos |
---|---|---|---|---|
|
|
ATMEL Corporation |
(TS8xC51Rx2) High Performance 8-bit Microcontrollers of the 80C51 with extended ROM/EPROM capacity (16/32/64 Kbytes), 256 bytes of internal RAM, a 7-source , 4-level interrupt system, an on-chip oscilator and three timer/counters. In addition, the TS80C51Rx2 has a Programmable Counter Array, an XRAM of |
|
|
|
ATMEL Corporation |
10-bit 2 Gsps ADC • • • • • • • • • • • • • • • • • • Up to 2 Gsps Sampling Rate Power Consumption: 4.6 W 500 mVpp Differential 100 Ω or Single-ended 50 Ω (±2 %) Analog Inputs Differential 100 Ω or Single-ended 50 Ω Clock Inputs ECL or LVDS Output Compatibility 50 Ω D |
|
|
|
ATMEL |
8-bit CMOS Microcontroller • 80Cw3w1wC.DoamtaSphaetiebt4leU.com • 8031 pin and instruction compatible • Four 8-bit I/O ports • Two 16-bit timer/counters • 128 bytes scratchpad RAM • High-Speed Architecture • 40 MHz @ 5V, 30MHz @ 3V • X2 Speed Improvement capability (6 clocks/m |
|
|
|
ATMEL |
ADC 8-bit 1 GSPS • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth (-3 dB) 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz SINAD = 42.9 dB (7.0 Ef |
|
|
|
ATMEL Corporation |
(TS8xC51Rx2) High Performance 8-bit Microcontroller • 80C52 Compatible – 8051 pin and instruction compatible – Four 8-bit I/O ports – Three 16-bit timer/counters – 256 bytes scratchpad RAM High-Speed Architecture – 40 MHz @ 5V, 30MHz @ 3V – X2 Speed Improvement capability (6 clocks/machine cycle) – 30 |
|
|
|
ATMEL Corporation |
(TS80C51U2 - TS87C51U2) Double UART 8-bit CMOS Microcontroller of the 80C51 with extended ROM/EPROM capacity (16 Kbytes), 256 bytes of internal RAM, a 7-source , 4-level interrupt system, an on-chip oscilator and three timer/counters. In addition, the TS80C51U2 has a second UART, enhanced functions on both UART, |
|
|
|
ATMEL Corporation |
(TS80C51U2 - TS87C51U2) Double UART 8-bit CMOS Microcontroller of the 80C51 with extended ROM/EPROM capacity (16 Kbytes), 256 bytes of internal RAM, a 7-source , 4-level interrupt system, an on-chip oscilator and three timer/counters. In addition, the TS80C51U2 has a second UART, enhanced functions on both UART, |
|
|
|
ATMEL Corporation |
8-bit Microcontroller • 80C52 Compatible – 8051 Pin and Instruction Compatible – Four 8-bit I/O Ports – Three 16-bit Timer/Counters – 256 Bytes Scratchpad RAM High-speed Architecture 40 MHz at 5V, 30 MHz at 3V X2 Speed Improvement Capability (6 Clocks/Machine Cycle) – 30 |
|
|
|
ATMEL Corporation |
8-bit Microcontroller • 80C52 Compatible – 8051 Pin and Instruction Compatible – Four 8-bit I/O Ports – Three 16-bit Timer/Counters – 256 Bytes Scratchpad RAM High-speed Architecture 40 MHz at 5V, 30 MHz at 3V X2 Speed Improvement Capability (6 Clocks/Machine Cycle) – 30 |
|
|
|
ATMEL |
Monolithic 10-bit high-speed (up to 2 GHz) demultiplexor • Programmable DMUX Ratio: – 1:4: Data Rate Max = 1 Gsps – PD (8b/10b) < 4.3/4.7 W (ECL 50Ω output) – 1:8: Data Rate Max = 2 Gsps – PD (8b/10b) < 6/6.9 W (ECL 50Ω output) – 1:16 with 1 TS8388B or 1 TS83102G0B and 2 DMUX • Parallel Output Mode • 8-/10 |
|
|
|
ATMEL |
10-bit 2 Gsps ADC MIL • Up to 2 Gsps Sampling Rate • Power Consumption: 4.6W • 500 mVpp Differential 100Ω or Single-ended 50Ω (±2 %) Analog Inputs • Differential 100Ω or Single-ended 50Ω Clock Inputs • ECL or LVDS Output Compatibility • 50Ω Differential Outputs with Commo |
|
|
|
ATMEL Corporation |
ADC 8-bit 500 Msps • • • • • • • • • • • • 8-bit Resolution 500 Msps (min) Sampling Rate Power Consumption: 3.8W Typ 500 mVpp Differential or Single-ended Analog Inputs Differential or Single-ended 50Ω ECL Compatible Clock Inputs ECL or LVDS/HSTL Output Compatibility A |
|
|
|
ATMEL Corporation |
ADC 8-bit 1 GSPS • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth (-3 dB) 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz SINAD = 42.9 dB (7.0 Ef |
|
|
|
ATMEL Corporation |
(TS8xC51Rx2) High Performance 8-bit Microcontrollers of the 80C51 with extended ROM/EPROM capacity (16/32/64 Kbytes), 256 bytes of internal RAM, a 7-source , 4-level interrupt system, an on-chip oscilator and three timer/counters. In addition, the TS80C51Rx2 has a Programmable Counter Array, an XRAM of |
|
|
|
ATMEL Corporation |
High Performance 8-bit Microcontroller • 80C52 Compatible – 8051 pin and instruction compatible – Four 8-bit I/O ports – Three 16-bit timer/counters – 256 bytes scratchpad RAM • High-Speed Architecture – 40 MHz @ 5V, 30MHz @ 3V – X2 Speed Improvement capability (6 clocks/machine cycle) – |
|
|
|
ATMEL Corporation |
High Performance 8-bit Microcontroller • 80C52 Compatible – 8051 pin and instruction compatible – Four 8-bit I/O ports – Three 16-bit timer/counters – 256 bytes scratchpad RAM • High-Speed Architecture – 40 MHz @ 5V, 30MHz @ 3V – X2 Speed Improvement capability (6 clocks/machine cycle) – |
|
|
|
ATMEL Corporation |
High Performance 8-bit Microcontroller • 80C52 Compatible – 8051 pin and instruction compatible – Four 8-bit I/O ports – Three 16-bit timer/counters – 256 bytes scratchpad RAM • High-Speed Architecture – 40 MHz @ 5V, 30MHz @ 3V – X2 Speed Improvement capability (6 clocks/machine cycle) – |
|
|
|
ATMEL Corporation |
High Performance 8-bit Microcontroller • 80C52 Compatible – 8051 pin and instruction compatible – Four 8-bit I/O ports – Three 16-bit timer/counters – 256 bytes scratchpad RAM • High-Speed Architecture – 40 MHz @ 5V, 30MHz @ 3V – X2 Speed Improvement capability (6 clocks/machine cycle) – |
|
|
|
ATMEL Corporation |
High Performance 8-bit Microcontroller • 80C52 Compatible – 8051 pin and instruction compatible – Four 8-bit I/O ports – Three 16-bit timer/counters – 256 bytes scratchpad RAM • High-Speed Architecture – 40 MHz @ 5V, 30MHz @ 3V – X2 Speed Improvement capability (6 clocks/machine cycle) – |
|
|
|
ATMEL Corporation |
High Performance 8-bit Microcontroller • 80C52 Compatible – 8051 pin and instruction compatible – Four 8-bit I/O ports – Three 16-bit timer/counters – 256 bytes scratchpad RAM • High-Speed Architecture – 40 MHz @ 5V, 30MHz @ 3V – X2 Speed Improvement capability (6 clocks/machine cycle) – |
|