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ICS542 |
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| Part Number | ICS542 |
| Manufacturer | ICST |
| Description | The ICS542 is a cost effective way to produce a high quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz, and produces a divide by 2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs on the chip, one being a low-skew divide by two of the other. So, for instance, if a 100 MHz clock is used, the ICS542 can . |
| Features |
• Packaged as 8 pin SOIC • ICS’ lowest cost clock divider • Low skew (500ps) outputs. One is ÷ 2 of other. • Easy to use with other generators and buffers • Input clock frequency up to 156 MHz • Output clock duty cycle of 45/55 • Power Down turns off chip • Output Enable • Advanced, low power CMOS process • Operating voltages of 3.0 to 5.5 V Block Diagram VDD GND 2 S1, S0 Divider and Selection Circuitry Input Clock ÷2 Output Buffer CLK Output Buffer CLK/2 OE (both outputs) 1 Revision 050400 Printed 11/14/00 Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA •95126 • (408) . |
| Datasheet |
 ICS542 Data Sheet
PDF 76.44KB |
| Distributor | Stock | Price | Buy |
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ICS542 |
| Part Number | ICS542 |
| Manufacturer | IDT |
| Title | CLOCK DIVIDER |
| Description | The ICS542 is cost effective way to produce a high-quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz at 3.3 V and produces a divide by 2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs on the chip, one being a low-skew divide by two of the ot. |
| Features |
• 8-pin SOIC package, Pb free • Available in RoHS compliant package • IDT’s lowest cost clock divider • Low skew (500 ps) outputs. One is /2 of the other • Easy to use with other generators and buffers • Input clock frequency up to 156 MHz • Output cl. |
ICS542 |
| Part Number | ICS542 |
| Manufacturer | Renesas |
| Title | CLOCK DIVIDER |
| Description | The ICS542 is cost effective way to produce a high-quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz at 3.3 V and produces a divide by 2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs on the chip, one being a low-skew divide by two of the ot. |
| Features |
• 8-pin SOIC package, Pb free • Available in RoHS compliant package • IDT’s lowest cost clock divider • Low skew (500 ps) outputs. One is /2 of the other • Easy to use with other generators and buffers • Input clock frequency up to 156 MHz • Output clock duty cycle of 45/55 • Power-down turns off chip • Output Enable • Advanced, low-power CMOS process • Operating voltage of 3.3 V or 5 V • Does not. |
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | ICS541 |
ICST |
PRELIMINARY INFORMATION PLL Clock Divider |
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| 2 | ICS543 |
ICST |
PRELIMINARY INFORMATION Clock Divider and 2X Multiplier |
|
| 3 | ICS544-01 |
Renesas |
CLOCK DIVIDER |
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| 4 | ICS548-03 |
ICST |
Low Skew Clock Inverter and Divider |
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| 5 | ICS548-03 |
Integrated Circuit Systems |
Low Skew Clock Inverter and Divider |
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| 6 | ICS548-05A |
ICST |
MP3 Audio Clock |
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| 7 | ICS548A-03 |
Integrated Device Technology |
LOW SKEW CLOCK INVERTER AND DIVIDER |
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| 8 | ICS548A-03 |
Renesas |
LOW SKEW CLOCK INVERTER AND DIVIDER |
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| 9 | ICS501 |
IDT |
PLL CLOCK MULTIPLIER |
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| 10 | ICS501 |
Renesas |
PLL CLOCK MULTIPLIER |
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Desde 2024. D4U Semiconductor.
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