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| Part Number | HD74LS112 |
| Distributor | Stock | Price | Buy |
|---|
| Part Number | HD74LS112 |
| Manufacturer | Hitachi Semiconductor |
| Title | Dual J-K Negative-edge-triggered Flip-Flops |
| Description | 19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 ± 0.05 0.20 ± 0.04 . |
| Features | s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change with. |
similar datasheet
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | HD74LS11 |
Hitachi Semiconductor |
Triple 3-input Positive AND Gates |
|
| 2 | HD74LS11 |
Renesas |
Triple 3-input Positive AND Gates |
|
| 3 | HD74LS112P |
Renesas |
Dual J-K Negative-edge-triggered Flip-Flops |
|
| 4 | HD74LS113 |
Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops |
|
| 5 | HD74LS114 |
Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops |
|
| 6 | HD74LS11P |
Renesas |
Triple 3-input Positive AND Gates |
|
| 7 | HD74LS10 |
Hitachi Semiconductor |
Triple 3-input Positive NAND Gates |
|
| 8 | HD74LS10 |
Renesas |
Triple 3-Input Positive NAND Gates |
|
| 9 | HD74LS107A |
Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops |
|
| 10 | HD74LS107A |
Renesas |
Dual J-K Negative-edge-triggered Flip-Flops |
|
Desde 2024. D4U Semiconductor.
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