Part Number | CY37032P44-125JI |
Manufacturer | Cypress Semiconductor |
Title | CY37032P44 - EE PLD, 10ns, 32-Cell PQCC44 ' |
Description | The Ultra37000™ family of CMOS CPLDs provides a range of high-density programmable logic solutions with unparalleled system performance. The Ultra37000 family is designed to bring the flexibility, ease of use, and performance of the 22V10 to high-density CPLDs. The architecture is based on a number ... |
Features |
• In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated inputs including four clock pins • Simple timing model — No fanout delays — No expander delays — No dedicated vs. I/O pin delays — No additional delay through PIM — No penalty for using full 16 product terms • • • • — No delay for steering or sharing product terms 3.3V and 5V versions PCI-compatible[1] Programmable bus-hold capabilities on all I/O... |
Document |
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Stock | 6 In Stock |
Price | 1000 units: 1.17 USD 500 units: 1.24 USD 100 units: 1.29 USD 25 units: 1.35 USD 1 units: 1.38 USD
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Part Number | CY37032P44-125JC |
Manufacturer | Cypress Semiconductor |
Title | 5V/ 3.3V/ ISR High-Performance CPLDs |
Description | The Ultra37000™ family of CMOS CPLDs provides a range of high-density programmable logic solutions with unparalleled system performance. The Ultra. |
Features |
• In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated inputs including four clock pins • Simple timing . |
Document | CY37032P44-125JC datasheet pdf |
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