74VHC02 Datasheet. existencias, precio

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74VHC02 Quad 2-Input NOR Gate

74VHC02


74VHC02
Part Number 74VHC02
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74VHC02

NXP
74VHC02
Part Number 74VHC02
Manufacturer NXP
Title Quad 2-input NOR gate
Description The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC02; 74VHCT02 provide a quad 2-input NOR function. 2. Features I Balanced propagation delays I All inputs have a.
Features I Balanced propagation delays I All inputs have a Schmitt-trigger action I Inputs accept voltages higher than VCC I Input levels: N The 74VHC02 operates with CMOS input level N The 74VHCT02 operates with TTL input level I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Multiple package options I Specified from −40 °C to +85 °C a.

74VHC02

ON Semiconductor
74VHC02
Part Number 74VHC02
Manufacturer ON Semiconductor
Title Quad 2-Input NOR Gate
Description The VHC02 is an advanced high-speed CMOS 2-Input NOR Gate fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages, including buffer out.
Features
■ High Speed: tPD = 3.6ns (Typ.) at VCC = 5V
■ Low power dissipation: ICC = 2µA (Max.) at TA = 25°C
■ High noise immunity: VNIH = VNIL = 28% VCC (Min.)
■ Power down protection is provided on all inputs
■ Low noise: VOLP = 0.8V (Max.)
■ Pin and function compatible with 74HC02 General Description The VHC02 is an advanced high-speed CMOS 2-Input NOR Gate fabricated with silicon gate CMOS technology..

74VHC02

STMicroelectronics
74VHC02
Part Number 74VHC02
Manufacturer STMicroelectronics
Title QUAD 2-INPUT NOR GATE
Description The 74VHC02 is an advanced high-speed CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. SOP TSSOP Table 1: O.
Features ace 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Figure 1: Pin Connection And IEC Logic Symbols November 2004 Rev. 5 1/11 74VHC02 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° 2, 5, 8, 11 3, 6, 9, 12 1, 4, 10, 13 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC.

74VHC02

nexperia
74VHC02
Part Number 74VHC02
Manufacturer nexperia
Title Quad 2-input NOR gate
Description The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC02; 74VHCT02 provide a quad 2-input NOR function. 2. Features and benefits • Balanced propagation delays • All.
Features and benefits
• Balanced propagation delays
• All inputs have a Schmitt-trigger action
• Inputs accept voltages higher than VCC
• Input levels:
• The 74VHC02 operates with CMOS input level
• The 74VHCT02 operates with TTL input level
• ESD protection:
• HBM JESD22-A114E exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101C exceeds 1000 V
• Multiple package options
• Specified from -40 .

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