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| Part Number | 74LS160 |
| Distributor | Stock | Price | Buy |
|---|
| Part Number | 74LS160 |
| Manufacturer | Motorola |
| Title | BCD DECADE COUNTERS/4-BIT BINARY COUNTERS |
| Description | The LS160A / 161A / 162A / 163A are 4-bit synchronous counters with a synchronous Parallel Enable (Load) feature. The counters consist of four edge-triggered D flip-flops with the appropriate data routing networks feeding the D inputs. All changes of the Q outputs (except due to the asynchronous Mas. |
| Features | The counters consist of four edge-triggered D flip-flops with the appropriate data routing networks feeding the D inputs. All changes of the Q outputs (except due to the asynchronous Master Reset in the LS160A and LS161A) occur as a result of, and synchronous with, the LOW to HIGH transition of the Clock input (CP). As long as the set-up time requirements are met, there are no special timing or a. |
| Part Number | 74LS160 |
| Manufacturer | Hitachi Semiconductor |
| Title | Synchronous Decade Counters |
| Description | 19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 ± 0.05 0.20 ± 0.04 . |
| Features | s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change with. |
| Part Number | 74LS160 |
| Manufacturer | ON Semiconductor |
| Title | BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS |
| Description | The LS160A / 161A / 162A / 163A are 4-bit synchronous counters with a synchronous Parallel Enable (Load) feature. The counters consist of four edge-triggered D flip-flops with the appropriate data routing networks feeding the D inputs. All changes of the Q outputs (except due to the asynchronous Mas. |
| Features | The counters consist of four edge-triggered D flip-flops with the appropriate data routing networks feeding the D inputs. All changes of the Q outputs (except due to the asynchronous Master Reset in the LS160A and LS161A) occur as a result of, and synchronous with, the LOW to HIGH transition of the Clock input (CP). As long as the set-up time requirements are met, there are no special timing or a. |
similar datasheet
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | 74LS16 |
Texas Instruments |
Hex Inverter Buffers/Drivers |
|
| 2 | 74LS160A |
Hitachi Semiconductor |
Synchronous Decade Counters |
|
| 3 | 74LS160A |
ON Semiconductor |
BCD DECADE COUNTERS/4-BIT BINARY COUNTERS |
|
| 4 | 74LS160A |
Motorola |
BCD DECADE COUNTERS / 4-BIT BINARY COUNTERS |
|
| 5 | 74LS161 |
SYC |
BCD DECADE COUNTERS / 4-BIT BINARY COUNTERS |
|
| 6 | 74LS161 |
Fairchild Semiconductor |
Synchronous 4-Bit Binary Counters |
|
| 7 | 74LS161 |
Motorola |
BCD DECADE COUNTERS/4-BIT BINARY COUNTERS |
|
| 8 | 74LS161 |
ON Semiconductor |
BCD DECADE COUNTERS/4-BIT BINARY COUNTERS |
|
| 9 | 74LS161 |
System Logic Semiconductor |
Synchronous 4-Bit Counters |
|
| 10 | 74LS161A |
Fairchild Semiconductor |
Synchronous 4-Bit Binary Counters |
|
Desde 2024. D4U Semiconductor.
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