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| Distributor | Stock | Price | Buy |
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74LS12 |
| Part Number | 74LS12 |
| Manufacturer | Hitachi Semiconductor |
| Title | Dual Retriggerable Monostable Multivibrators |
| Description | 19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 ± 0.05 0.20 ± 0.04 . |
| Features | s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change with. |
74LS12 |
| Part Number | 74LS12 |
| Manufacturer | Fairchild Semiconductor |
| Title | Dual Retriggerable One-Shot |
| Description | The DM74LS123 is a dual retriggerable monostable multivibrator capable of generating output pulses from a few nano-seconds to extremely long duration up to 100% duty cycle. Each device has three inputs permitting the choice of either leading edge or trailing edge triggering. Pin (A) is an active-LOW. |
| Features | s DC triggered from active-HIGH transition or active-LOW transition inputs s Retriggerable to 100% duty cycle s Compensated for VCC and temperature variations s Triggerable from CLEAR input s DTL, TTL compatible s Input clamp diodes Ordering Code: Order Number DM74LS123M DM74LS123SJ DM74LS123N Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JE. |
74LS12 |
| Part Number | 74LS12 |
| Manufacturer | ON Semiconductor |
| Title | LOW POWER SCHOTTKY |
| Description | SN74LS122 SN74LS123 Retriggerable Monostable Multivibrators These dc triggered multivibrators feature pulse width control by three methods. The basic pulse width is programmed by selection of external resistance and capacitance values. The LS122 has an internal timing resistor that allows the circui. |
| Features | pulse width control by three methods. The basic pulse width is programmed by selection of external resistance and capacitance values. The LS122 has an internal timing resistor that allows the circuits to be used with only an external capacitor. Once triggered, the basic pulse width may be extended by retriggering the gated low-level-active (A) or high-level-active (B) inputs, or be reduced by use . |
74LS12 |
| Part Number | 74LS12 |
| Manufacturer | Motorola |
| Title | RETRIGGERABLE MONOSTABLE MULTIVIBRATORS |
| Description | www.DataSheet4U.com SN54/74LS12 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE V CC 14 13 12 11 10 9 8 LOW POWER SCHOTTKY * * * 1 2 3 4 5 6 7 GND J SUFFIX CERAMIC CASE 632-08 14 1 * OPEN COLLECTOR OUTPUTS 14 1 N SUFFIX PLASTIC CASE 646-06 14 1 D SUFFIX SOIC CASE 751A-02 ORDER. |
| Features |
ut LOW – 0.4 1.4 3.3 0.35 0.5 20 IIH IIL ICC V µA mA mA 54, 74 54, 74 0.25 – 0.65 0.8 – 1.5 100 0.4 V µA V Min 2.0 0.7 V Typ Max Unit V www.DataSheet4U.com Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = – 18 mA VCC = MIN, VOH = MAX IOL = 4.0 mA IOL = 8.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MAX, VIN =. |
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | 74LS10 |
ON Semiconductor |
TRIPLE 3-INPUT NAND GATE |
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| 2 | 74LS10 |
Fairchild Semiconductor |
Triple 3-Input NAND Gate |
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| 3 | 74LS107 |
ETC |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
|
| 4 | 74LS109 |
Agere Systems |
Dual J-K Flip-Flop |
|
| 5 | 74LS109A |
ON Semiconductor |
LOW POWER SCHOTTKY |
|
| 6 | 74LS109A |
Texas Instruments |
Dual J-K Positive-Edge-Triggered Flip-Flops |
|
| 7 | 74LS11 |
Fairchild Semiconductor |
Triple 3-Input AND Gate |
|
| 8 | 74LS112 |
Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops |
|
| 9 | 74LS112A |
Motorola |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
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| 10 | 74LS112A |
Fairchild Semiconductor |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop |
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Desde 2024. D4U Semiconductor.
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