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74HC132D Quad 2-input NAND Schmitt trigger

74HC132D

74HC132D
74HC132D 74HC132D
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Part Number 74HC132D
Manufacturer nexperia (https://www.nexperia.com/)
Description The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. 2. Features and benefits • Wide supply.
Features
• Wide supply voltage range from 2.0 to 6.0 V
• CMOS low power dissipation
• High noise immunity
• Unlimited input rise and fall times
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Multiple package options
• Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Applications
• Wave and pulse shapers
• Astable multivibrators
• Monostable multivibrators 4. Ordering information Table 1. Ordering i.
Datasheet Datasheet 74HC132D Data Sheet
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74HC132D

Toshiba
74HC132D
Part Number 74HC132D
Manufacturer Toshiba
Title Quad 2-Input Schmitt NAND Gate
Description • Quad 2-Input Schmitt NAND Gate 2. General The 74HC132D is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Pin configuration and func.
Features (1) Wide operating temperature range: Topr = -40 to 125
� (Note 1) (2) High speed: tpd = 11 ns (typ.) at VCC = 5 V (3) Low power dissipation: ICC = 1.0 µA (max) at Ta = 25
� (4) High noise immunity: VH = 1.1 V (typ.) at VCC = 4.5 V (5) Balanced propagation delays: tPLH ≈ tPHL (6) Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V Note 1: Operating Range spec of Topr = -40
� to 125
� is applicab.


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