Part Number | 74F283 |
Distributor | Stock | Price | Buy |
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Part Number | 74F283 |
Manufacturer | Fairchild |
Title | 4-Bit Binary Full Adder |
Description | The 74F283 high-speed 4-bit binary full adder with internal carry lookahead accepts two 4-bit binary words (A0–A3, B0–B3) and a Carry input (C0). It generates the binary Sum outputs (S0–S3) and the Carry output (C4) from the most significant bit. The 74F283 will operate with either active HIGH or ac. |
Features |
0 –B3 C0 S0 –S3 C4 Description A Operand Inputs B Operand Inputs Carry Input Sum Outputs Carry Output U.L. Input IIH/IIL 20 µA/−1.2 mA 20 µA/−1.2 mA 20 µA/−0.6 mA −1 mA/20 mA −1 mA/20 mA HIGH/LOW Output IOH/IOL 1.0/2.0 1.0/2.0 1.0/1.0 50/33.3 50/33.3 © 1999 Fairchild Semiconductor Corporation DS009513 www.fairchildsemi.com 74F283 Functional Description The 74F283 adds two 4-bit binary words (A . |
Part Number | 74F283 |
Manufacturer | National |
Title | 4-Bit Binary Full Adder |
Description | The ’F283 high-speed 4-bit binary full adder with internal carry lookahead accepts two 4-bit binary words (A0 –A3 B0 – B3) and a Carry input (C0) It generates the binary Sum outputs (S0 – S3) and the Carry output (C4) from the most significant bit The ’F283 will operate with either active HIGH or ac. |
Features | Y Guaranteed 4000V minimum ESD protection Commercial 74F283PC Military Package Number N16E Package Description 16-Lead (0 300 Wide) Molded Dual-In-Line 16-Lead Ceramic Dual-In-Line 16-Lead (0 150 Wide) Molded Small Outline JEDEC 16-Lead (0 300 Wide) Molded Small Outline EIAJ 16-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F283DM (Note 2) 74F283SC (Note 1) 74F283SJ (Note 1) 54F. |
Part Number | 74F283 |
Manufacturer | Texas Instruments |
Title | 4-Bit Binary Full Adders |
Description | The ′F283 is a full adder that performs the addition of two 4-bit binary words. The sum (Σ) outputs are provided for each bit and the resultant carry (C4) output is obtained from the fourth bit. The device features full internal look-ahead across all four bits generating the carry term C4 in typical. |
Features | full internal look-ahead across all four bits generating the carry term C4 in typically 5.7 ns. This capability provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation. The adder logic, including the carry, is implemented in its true form. End-around carry can be accomplished without the need for logic or level inve. |
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