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74S10 |
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| Part Number | 74S10 |
| Manufacturer | TW |
| Description | 54S10/74S10 STTL 3 ： tpd=3ns Pd=19mW/ （1/3） ： ： ： B H × L × Y L H H H A H L × × C H × × L 74Ⅱ Vcc VIH VIL IOH IOL TA -40 4.75 2 0.8 -1.0 20 85 -55 5 5.25 4.5 2 0.8 20 125 54 ... |
| Features |
... |
| Document |
 74S10 Data Sheet
PDF 293.85KB |
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | 74S112 |
Fairchild Semiconductor |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop |
|
| 2 | 74S133 |
SYC |
13-Input NAND Gate |
|
| 3 | 74S134 |
Fairchild |
12-INPUT POSITIVE-NAND GATES |
|
| 4 | 74S134 |
Signetics |
12-INPUT POSITIVE-NAND GATES |
|
| 5 | 74S135 |
Fairchild |
Quad Exclusive OR/NOR Gate |
|
| 6 | 74S135 |
Signetics |
Quad Exclusive OR/NOR Gate |
|
Desde 2024. D4U Semiconductor.
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