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H55S1262EFP-A3M |
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| Part Number | H55S1262EFP-A3M |
| Manufacturer | Hynix Semiconductor |
| Description | and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 /Aug. 2009 1 11 128Mbit (8Mx16bit) Mobile SDR ... |
| Features |
● ● ● Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During burst Read or Write operation, a different bank is activated and burst Read or Write for that bank is performed - During auto precharge burst Read or Write, burst Read or Write for a different bank is performed ● ● ● ● ● ● ● ● Power Supply Voltage : VDD / VDDQ = 1.7V to 1.95V LVCMOS compatible I/O Interface Lo... |
| Document |
 H55S1262EFP-A3M Data Sheet
PDF 796.95KB |
Similar Datasheet
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | H55S1262EFP-A3E |
Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O |
|
| 2 | H55S1262EFP-60E |
Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O |
|
| 3 | H55S1262EFP-60M |
Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O |
|
| 4 | H55S1262EFP-75E |
Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O |
|
| 5 | H55S1262EFP-75M |
Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O |
|
| 6 | H55S1222EFP-60E |
Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 1M x 4Bank x32 I/O |
|
Desde 2024. D4U Semiconductor.
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