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IDTCSPUA877A |
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| Part Number | IDTCSPUA877A |
| Manufacturer | Integrated Device Technology |
| Description | IDTCSPUA877A • 1 to 10 differential clock distribution • Optimized for clock distribution in DDR2 (Double Data Rate) SDRAM applications • Operating frequency: 125MHz to 410MHz • Stabilization time:... |
| Features |
DESCRIPTION:
IDTCSPUA877A
• 1 to 10 differential clock distribution • Optimized for clock distribution in DDR2 (Double Data Rate) SDRAM applications • Operating frequency: 125MHz to 410MHz • Stabilization time: <6us • Very low skew: ≤40ps • Very low jitter: ≤40ps • 1.8V AVDD and 1.8V VDDQ • CMOS control signal input • Test mode enables buffers while disabling PLL • Low current power-down mode • Tolerant of Spread Spectrum input clock • Available in 52-Ball VFBGA and 40-pin VFQFPN packages APPLICATIONS: • Meets or exceeds JEDEC standard CUA877 for registered DDR2 clock driver • Along with ... |
| Document |
 IDTCSPUA877A Data Sheet
PDF 122.10KB |
Similar Datasheet
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | IDTCSPU877A |
Integrated Device Technology |
1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER |
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| 2 | IDTCSPU877D |
Integrated Device Technology |
1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER |
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| 3 | IDTCSP2510C |
Integrated Device |
3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER |
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| 4 | IDTCSP2510D |
IDT |
3.3V PHASE-LOCK LOOP CLOCK DRIVER |
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| 5 | IDTCSPF2510C |
Integrated Device Technology |
3.3V PHASE-LOCK LOOP CLOCK DRIVER |
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| 6 | IDTCSPT855 |
Integrated Device Technology |
2.5V PHASE LOCKED LOOP CLOCK DRIVER |
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Desde 2024. D4U Semiconductor.
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