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CS5825 |
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| Part Number | CS5825 |
| Manufacturer | Myson Technology |
| Description | CS5825 receives four LVDS data channels and one LVDS clock channel. Each data channel is deserialized into 7-bit parallel data bus for output. The clock channel is used for frame sync and fed into an ... |
| Features |
CS5825
28:4 LVDS Receiver
• Four 7-bit serial data LVDS channels and one clock LVDS channel. • Compatible with ANSI TIA/EIA-644 LVDS standard. • Wide serial clocking speed ranges from 31MHz to 68MHz. • Support open-safe LVDS design. • Fully integrated on-chip PLL and digital phase alignment provide accurate deserializer operation. • Support power-down mode. • 5V/3.3V tolerant data input. • Single 3.3V supply operation. • CMOS low power consumption. • Functional compatible with DS90CF384 and SN75LVDS86. • Available in 56-pin TSSOP package. BLOCK DIAGRAM CS5825 PL DataSheet4U.com CLK QD AIP... |
| Document |
 CS5825 Data Sheet
PDF 312.86KB |
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Desde 2024. D4U Semiconductor.
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