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EPM5064 |
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| Part Number | EPM5064 |
| Manufacturer | Altera |
| Description | s Programming support with Altera’s Master Programming Unit (MPU) or programming hardware from other manufacturers s Additional design entry and simulation support provided by EDIF, LPM, Verilog HDL,... |
| Features |
..
s Advanced Multiple Array MatriX (MAX) 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
s Complete family of high-performance, erasable CMOS EPROM EPLDs for designs ranging from fast 28-pin address decoders to 100-pin LSI custom peripherals
s 600 to 3,750 usable gates (see Table 1) s Fast, 15-ns combinatorial delays and 83.3-MHz counter frequencies s Configurable expander product-term distribution allowing more
than 32 product terms in a single macrocell s 28 to 100 pins available in DIP, J-lead, PGA, SOIC, and QFP packages s Pro... |
| Document |
 EPM5064 Data Sheet
PDF 399.21KB |
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Desde 2024. D4U Semiconductor.
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