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ML6692 |
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| Part Number | ML6692 |
| Manufacturer | Micro Linear |
| Description | The ML6692 implements the complete physical layer of the Fast Ethernet 100BASE-TX standard. The ML6692 interfaces to the controller through the standard-compliant Media Independent Interface (MII). Th... |
| Features |
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Single-chip 100BASE-TX physical layer Compliant to IEEE 802.3u 100BASE-TX standard Supports adapter, repeater and switch applications Single-jack 10BASE-T/100BASE-TX solution when used with external 10Mbps PHY Compliant MII (Media Independant Interface) Auto-negotiation capability 4B/5B encoder/decoder Stream Cipher scrambler/descrambler 125MHz clock recovery/generation Baseline wander correction Adaptive equalization and MLT-3 encoding/decoding Supports full-duplex operation
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BLOCK DIAGRAM
1 9
(PLCC Package)
49 48
CLOCK SYNTHESIZER
TXCLK
3 4 5 6 7 8 18 19 17 10 1... |
| Document |
 ML6692 Data Sheet
PDF 325.57KB |
Similar Datasheet
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | ML6691 |
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100BASE-T MII-to-PMD Transceiver |
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| 2 | ML6694 |
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100BASE-TX Physical Layer with 5-Bit Interface |
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| 3 | ML6695 |
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100BASE-X Fiber Physical Layer With 5-bit Interface |
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| 4 | ML6696 |
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100BASE-X Fiber Physical Layer |
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| 5 | ML6697 |
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| 6 | ML6698 |
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100BASE-TX Physical Layer with 5-Bit Interface |
|
Desde 2024. D4U Semiconductor.
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