MCM72FB8ML |
Part Number | MCM72FB8ML |
Manufacturer | Motorola |
Description | Pin Locations E10 Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address. Used to initiate READ, WRITE, ... |
Features |
an be initiated with either ADSP or ADSC input pins. Subsequent burst addresses can be generated internally (burst sequence operates in linear or interleaved mode dependent upon the state of LBO) and controlled by the burst address advance (ADV) input pin. Write cycles are internally self –timed and are initiated by the rising edge of the clock (K) input. This feature eliminates complex off –chip write pulse generation and provides increased timing flexibility for incoming signals. Synchronous byte write (SBx), synchronous global write (SGW), and synchronous write enable (SW) are provided to all... |
Document |
MCM72FB8ML Data Sheet
PDF 252.94KB |
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---|---|---|---|---|
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3 | MCM72F7 |
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