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MCM69P536C |
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| Part Number | MCM69P536C |
| Manufacturer | Motorola |
| Description | Pin Locations 85 84 Symbol ADSC ADSP Type Input Input Description Synchronous Address Status Controller: Initiates READ, WRITE, or chip deselect cycle. Synchronous Address Status Processor: Initiates... |
| Features |
or ADSC input pins. Subsequent burst addresses can be generated internally by the MCM69P536C (burst sequence operates in linear or interleaved mode dependent upon the state of LBO) and controlled by the burst address advance (ADV) input pin. Write cycles are internally self –timed and are initiated by the rising edge of the clock (K) input. This feature eliminates complex off –chip write pulse generation and provides increased timing flexibility for incoming signals. Synchronous byte write (SBx), synchronous global write (SGW), and synchronous write enable SW are provided to allow writes to eit... |
| Document |
 MCM69P536C Data Sheet
PDF 210.72KB |
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Desde 2024. D4U Semiconductor.
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