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MCM63Z737 |
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| Part Number | MCM63Z737 |
| Manufacturer | Motorola |
| Description | Pin Locations 85 89 87 (a) 51, 52, 53, 56, 57, 58, 59, 62, 63 (b) 68, 69, 72, 73, 74, 75, 78, 79, 80 (c) 1, 2, 3, 6, 7, 8, 9, 12, 13 (d) 18, 19, 22, 23, 24, 25, 28, 29, 30 86 31 Symbol ADV CK CKE DQx... |
| Features |
linear burst order (LBO) are clock (CK) controlled through positive – edge –triggered noninverting registers. Write cycles are internally self –timed and are initiated by the rising edge of the clock (CK) input. This feature eliminates complex off –chip write pulse generation and provides increased timing flexibility for incoming signals. For read cycles, a flow –through SRAM allows output data to simply flow freely from the memory array. • 3.3 V LVTTL and LVCMOS Compatible • MCM63Z737/MCM63Z819 –11 = 11 ns Access/15 ns Cycle (66 MHz) MCM63Z737/MCM63Z819 –15 = 15 ns Access/20 ns Cycle (50 MHz) • Sele... |
| Document |
 MCM63Z737 Data Sheet
PDF 218.63KB |
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Desde 2024. D4U Semiconductor.
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