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SN54LS113A |
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| Part Number | SN54LS113A |
| Manufacturer | Motorola Inc |
| Description | SN54/74LS113A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIG... |
| Features |
4LSXXXJ SN74LSXXXN SN74LSXXXD
Ceramic Plastic SOIC
LOGIC SYMBOL
4 10
H, h = HIGH Voltage Level L, I = LOW Voltage Level X = Don’t Care l, h (q) = Lower case letters indicate the state of the referenced input (or output) l, h (q) = one set-up time prior to the HIGH to LOW clock transition.
SD
Q
5
11
J
SD
Q
9
1 2
13 Q 6 12
CP Q 8
K
K
VCC = PIN 14 GND = PIN 7
FAST AND LS TTL DATA 5-189
SN54/74LS113A
GUARANTEED OPERATING RANGES
Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current — High Output Current — Low Parameter 54 74 54 74 54, 74 54 74 Mi... |
| Document |
 SN54LS113A Data Sheet
PDF 140.23KB |
Similar Datasheet
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | SN54LS11 |
Motorola Inc |
TRIPLE 3-INPUT AND GATE |
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| 2 | SN54LS11 |
Texas Instruments |
TRIPLE 3-INPUT POSITIVE-AND GATES |
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| 3 | SN54LS112A |
Motorola Inc |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
|
| 4 | SN54LS112A |
Texas Instruments |
Dual J-K Negative-Edge-Triggered Flip-Flops |
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| 5 | SN54LS114A |
Motorola Inc |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
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| 6 | SN54LS10 |
Motorola Inc |
TRIPLE 3-INPUT NAND GATE |
|
Desde 2024. D4U Semiconductor.
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