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YSS902 |
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| Part Number | YSS902 |
| Manufacturer | ETC |
| Description | The YSS902 consist of Main DSP section where AC-3/Pro Logic decoding is executed and Sub DSP section where various sound field effects are added. Please refer to “BLOCK DIAGRAM” section. Sub DSP is a ... |
| Features |
processing such as original surround, filtering, virtual surround etc. Up to 1.36 second delay time is capable when used with an external 1Mbit SRAM. (at fs= 48 kHz) Reads Dolby Digital decode information through the microprocessor interface. Provide total sixteen I/O ports. Possible to connect most of SPDIF receivers, A/D and D/A converters, by setting I/O data interface format. Has a built-in PLL oscillation circuit to generates its own operating clock. Internal operating clock is 25MHz. Supply Voltage: 3.3v for core logic. 5v for I/Os. Power saving mode. Si-gate CMOS process. 100 QFP.(YSS90... |
| Document |
 YSS902 Data Sheet
PDF 597.75KB |
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Desde 2024. D4U Semiconductor.
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