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S3C4510B |
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| Part Number | S3C4510B |
| Manufacturer | Samsung semiconductor |
| Description | Table 1-1. S3C4510B Signal Descriptions Signal XCLK Pin No. 80 Type I Description S3C4510B system clock source. If CLKSEL is Low, PLL output clock is used as the S3C4510B internal system clock. If CL... |
| Features |
Architecture • • • Integrated system for embedded ethernet applications Fully 16/32-bit RISC architecture Little/Big-Endian mode supported basically, the internal architecture is big-endian. So, the little-endian mode only support for external memory. Efficient and powerful ARM7TDMI core Cost-effective JTAG-based debug solution Boundary scan • • • • • • • • • • Data alignment logic Endian translation 100/10-Mbit per second operation Full compliance with IEEE standard 802.3 MII and 7-wire 10-Mbps interface Station management signaling On-chip CAM (up to 21 destination addresses) Full-duplex mod... |
| Document |
 S3C4510B Data Sheet
PDF 2.14MB |
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Desde 2024. D4U Semiconductor.
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