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M2006-12 |
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| Part Number | M2006-12 |
| Manufacturer | Integrated Circuit Solution Inc |
| Description | The M2006-02 and -12 are VCSO (Voltage Controlled SAW Oscillator) based clock generator PLLs designed for clock frequency translation and jitter attenuation. They support both forward and inverse FEC ... |
| Features |
• Pin-selectable PLL divider ratios support forward and inverse FEC ratio translation, including: • 255/238 (OTU1) Mapping and 238/255 De-mapping • 255/237 (OTU2) Mapping and 237/255 De-mapping • 255/236 (OTU3) Mapping and 236/255 De-mapping Example I/O Clock Frequency Combinations Using M2006-02/-12-622.0800 and Inverse FEC Ratios FEC PLL Ratio Mfec / Rfec 1/1 238/255 237/255 236/255 Base Input Rate 1 (MHz) 622.0800 666.5143 669.3266 672.1627 Output Clock (either output) MHz 622.08 or 155.52 • Supports input reference and VCSO frequencies up • • • • • to 700MHz, supports loop timing modes (... |
| Document |
 M2006-12 Data Sheet
PDF 83.76KB |
Similar Datasheet
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|---|---|---|---|---|
| 1 | M2006-12A |
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VCSO BASED FEC CLOCK PLL WITH HITLESS SWITCHING |
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| 2 | M2006-02 |
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VCSO BASED FEC CLOCK PLL / HITLESS SWITCHING OPTION |
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| 3 | M2006C |
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| 6 | M2004-01 |
ICS |
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Desde 2024. D4U Semiconductor.
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