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ICS95V157 |
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| Part Number | ICS95V157 |
| Manufacturer | Renesas (https://www.renesas.com/) |
| Description | Features: • Low skew, low jitter PLL clock driver • 1 to 10 differential clock distribution (SSTL_2) • Feedback pin for input to output synchronization • PD# for power management • Spread Spectrum tol... |
| Features |
• Low skew, low jitter PLL clock driver • 1 to 10 differential clock distribution (SSTL_2) • Feedback pin for input to output synchronization • PD# for power management • Spread Spectrum tolerant inputs Switching Characteristics: • CYCLE - CYCLE jitter: <60ps • OUTPUT - OUTPUT skew: <60ps • Period jitter: ±30ps • DUTY CYCLE: 49.5% - 50.5% Pin Configuration Block Diagram 48-Pin TSSOP 6.10 mm. Body, 0.50 mm. pitch = TSSOP Functionality INPUTS OUTPUTS AVDD PD# CLK_INT CLKT CLKC FB_OUTT PLL State GND H L LH L Bypassed/off GND H H HL 2.5V (nom) L L ZZ 2.5V (nom) L H ZZ 2.5... |
| Document |
 ICS95V157 Data Sheet
PDF 352.87KB |
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Desde 2024. D4U Semiconductor.
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