8A34001 |
Part Number | 8A34001 |
Manufacturer | Renesas (https://www.renesas.com/) |
Description | Synchronization Management Unit 8A34001 Datasheet Overview The 8A34001 Synchronization Management Unit (SMU) provides tools to manage timing references, clock sources, and timing paths for IEEE 1588... |
Features |
▪ Eight independent timing channels
• Each can act as a frequency synthesizer, jitter attenuator, Digitally Controlled Oscillator (DCO) or Digital Phase Lock Loop (DPLL) • DPLLs generate telecom compliant clocks ▪ Compliant with ITU-T G.8262 for Synchronous Ethernet ▪ Compliant with legacy SONET/SDH and PDH requirements • DPLL Digital Loop Filters (DLFs) are programmable with cut off frequencies from 12µHz to 22kHz • DPLL/DCO channels share frequency information using the Combo Bus to simplify compliance with ITU-T G.8273.2 • Switching between DPLL and DCO modes is hitless and dynamic ▪ Automa... |
Document |
8A34001 Data Sheet
PDF 2.52MB |
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