XC2S30 |
Part Number | XC2S30 |
Manufacturer | Xilinx |
Description | DS001-2 (v2.9) March 12, 2021 • Architectural Description - Spartan-II Array - Input/Output Block - Configurable Logic Block - Block RAM - Clock Distribution: Delay-Locked Loop - Boundary Scan • Devel... |
Features |
• General Overview • Product Availability • User I/O Chart • Ordering Information Module 2: Functional Description DS001-2 (v2.9) March 12, 2021 • Architectural Description - Spartan-II Array - Input/Output Block - Configurable Logic Block - Block RAM - Clock Distribution: Delay-Locked Loop - Boundary Scan • Development System • Configuration - Configuration Timing • Design Considerations Module 3: DC and Switching Characteristics DS001-3 (v2.9) March 12, 2021 • DC Specifications - Absolute Maximum Ratings - Recommended Operating Conditions - DC Characteristics - Power-On Requirements - DC In... |
Document |
XC2S30 Data Sheet
PDF 0.97MB |