XC2S100E |
Part Number | XC2S100E |
Manufacturer | Xilinx |
Description | DS077-2 (v3.0) August 9, 2013 • Architectural Description - Spartan-IIE Array - Input/Output Block - Configurable Logic Block - Block RAM - Clock Distribution: Delay-Locked Loop - Boundary Scan • Deve... |
Features |
• General Overview • Product Availability • User I/O Chart • Ordering Information Module 2: Functional Description DS077-2 (v3.0) August 9, 2013 • Architectural Description - Spartan-IIE Array - Input/Output Block - Configurable Logic Block - Block RAM - Clock Distribution: Delay-Locked Loop - Boundary Scan • Development System • Configuration Module 3: DC and Switching Characteristics DS077-3 (v3.0) August 9, 2013 • DC Specifications - Absolute Maximum Ratings - Recommended Operating Conditions - DC Characteristics - Power-On Requirements - DC Input and Output Levels • Switching Characterist... |
Document |
XC2S100E Data Sheet
PDF 4.31MB |