EPM3256A Altera Logic, Hoja de datos, Ficha técnica, Distribuidor, Inventario y Mejor Precio

EPM3256A

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Part Number	EPM3256A
Manufacturer	Altera
Description	■ PCI compatible ■ Bus–friendly architecture including programmable slew–rate control ■ Open–drain output option ■ Programmable macrocell flipflops with individual clear, preset, clock, and clock ena...
Features	.. ■ High –performance, low –cost CMOS EEPROM –based programmable logic devices (PLDs) built on a MAX® architecture (see Table 1) ■ 3.3-V in-system programmability (ISP) through the built –in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability – ISP circuitry compliant with IEEE Std. 1532 ■ Built –in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990 ■ Enhanced ISP features: – Enhanced ISP algorithm for faster programming – ISP_Done bit to ensure complete programming – Pull-up resistor on I/O pins during in –system programming ■ High –d...
Document	EPM3256A Data Sheet PDF 729.56KB

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