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74HCT107-Q100 |
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| Part Number | 74HCT107-Q100 |
| Manufacturer | nexperia (https://www.nexperia.com/) |
| Description | The 74HC107-Q100; 74HCT107-Q100 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an a... |
| Features |
• Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Complies with JEDEC standards: • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.0 V) • Input levels: • For 74HC107-Q100: CMOS level • For 74HCT107-Q100: TTL level • ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V (C = 200 p... |
| Document |
 74HCT107-Q100 Data Sheet
PDF 254.58KB |
Desde 2024. D4U Semiconductor.
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