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A3R1GE4EGF |
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| Part Number | A3R1GE4EGF |
| Manufacturer | Zentel |
| Description | A3R1GE4EGF 1Gb DDRII Synchronous DRAM 1Gb DDRII SDRAM Specification A3R1GE4EGF Zentel Electronics Corp. Revision 1.0 Apr., 2010 Specifications • Density: 1G bits • Organization ⎯ 8M words × 16 bit... |
| Features |
• Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • DQS is edge-aligned with data for READs; centeraligned with data for WRITEs • Differential clock inputs (CK and /CK) • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Data mask (DM) for write data • Posted /CAS ... |
| Document |
 A3R1GE4EGF Data Sheet
PDF 1.64MB |
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | A3R1GE40JBF |
Zentel |
1Gb DDRII Synchronous DRAM |
|
| 2 | A3R1GE30JBF |
Zentel |
1Gb DDRII Synchronous DRAM |
|
| 3 | A3R12E30CBF |
Zentel |
512Mb DDRII Synchronous DRAM |
|
| 4 | A3R12E30DBF |
Zentel |
512Mb DDRII SDRAM |
|
| 5 | A3R12E40CBF |
Zentel |
512Mb DDRII Synchronous DRAM |
|
| 6 | A3R12E40DBF |
Zentel |
512Mb DDRII SDRAM |
|
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