logo

Si53301 Ultra-Low Additive Jitter Fanout Clock Buffers

Features include independent (synchronous) output enable, glitchless switching, LOS monitor of input clocks, output clock division, and built-in format translation. These buffers can be paired with the Si534x clocks and jitter attenuators, the Si5332 clocks, and the Si5xx oscillators to deliver end-to-end clock tree performance. KEY FEATURES
• Ultra-low additive jitter: 50 fs rms
• Built-in LDOs for high PSRR performance
• Up to 10 outputs
• Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS)
• Wide frequency range
• Output Enable option
• Multiple configuration options
• Dual Bank o



Distributor Stock Price Buy





Similar Product

No. Part # Manufacture Description Datasheet
1
SI5330

Silicon Laboratories
LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
Datasheet
2
Si53302

Skyworks
Ultra-Low Additive Jitter Fanout Clock Buffers
Datasheet
3
SI53302

Silicon Laboratories
1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR
Datasheet
4
Si53303

Skyworks
Ultra-Low Additive Jitter Fanout Clock Buffers
Datasheet
5
SI53303

Silicon Laboratories
DUAL 1:5 LOW JITTER BUFFER/LEVEL TRANSLATOR
Datasheet
6
Si53304

Skyworks
Ultra-Low Additive Jitter Fanout Clock Buffers
Datasheet
7
SI53304

Silicon Laboratories
1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR
Datasheet
8
Si53305

Skyworks
Ultra-Low Additive Jitter Fanout Clock Buffers
Datasheet
9
SI53305

Silicon Laboratories
1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR
Datasheet
10
Si53306

Skyworks
Ultra-Low Additive Jitter Fanout Clock Buffers
Datasheet
11
SI53306

Silicon Laboratories
1:4 LOW-JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR
Datasheet
12
Si53307

Skyworks
Ultra-Low Additive Jitter Fanout Clock Buffers
Datasheet




logo    Desde 2024. D4U Semiconductor.   |   Contáctenos   |   Política de Privacidad