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IDT79R3081 Integrated Device RISController with FPA Datasheet

IDT79R3081-25BCG8


Integrated Device
IDT79R3081
Part Number IDT79R3081
Manufacturer Integrated Device
Description of this processor. • The R3051, which incorporates 4kB of instruction cache and 2kB of data cache, but omits the TLB, and instead uses a simpler virtual to physical address mapping. • The R3081E, which incorporates a 16kB instruction cache, a 4kB data cache, and full function memory management unit...
Features
• Instruction set compatible with IDT79R3000A, R3041, R3051, and R3071 RISC CPUs
• High level of integration minimizes system cost — R3000A Compatible CPU — R3010A Compatible Floating Point Accelerator — Optional R3000A compatible MMU — Large Instruction Cache — Large Data Cache — Read/Write Buffers
• 43VUPS at 50MHz — 13MFlops
• Flexible bus interface allows simple, low cost designs
• Optional 1x or 2x clock input
• 20 through 50MHz operation
• "V" version operates at 3.3V
• 50MHz at 1x clock input and 1/2 bus frequency only
• Large on-chip caches with user configurability — 16kB Instruction...

Document Datasheet IDT79R3081 datasheet pdf (294.34KB)
Distributor Distributor
Quest Components
Stock 5544 In Stock
Price
611 units: 25 USD
292 units: 26.25 USD
1 units: 32.5 USD
BuyNow BuyNow BuyNow (Manufacturer a Integrated Device Technology Inc)




IDT79R3081 Distributor

part
Integrated Device Technology Inc
IDT79R3081-25BCG8
611 units: 25 USD
292 units: 26.25 USD
1 units: 32.5 USD
Distributor
Quest Components

5544 In Stock
BuyNow BuyNow
part
IDT79R3081E-25DL
INSTOCK
No price available
Distributor
Chip 1 Exchange

2 In Stock
No Longer Stocked
part
Integrated Device Technology Inc
IDT79R3081-40MJ
No price available
Distributor
Bristol Electronics

12 In Stock
No Longer Stocked





IDT79R3081 Similar Datasheet

Part Number Description
IDT79R3041
manufacturer
Integrated Device
INTEGRATED RISController FOR LOW-COST SYSTEMS
Languages Master Pipeline Control System Control Coprocessor Exception/Control Registers Bus Interface Registers PortSize Register Counter Registers 32 Physical Address Bus SBrCond(3:2) Int(5:3), SInt(2:0) TC Integer CPU Core General Registers (32 x 32) ALU Shifter Mult/Div Unit Address Adder PC Control Virtual Address 32 Instruction Cache 2kB Data Bus R3051 Superset Bus Interface Unit 4-deep Write Buffer Data Unpack Unit Address/ Data 4-deep Read Buffer Data Pack Unit DMA Ctrl DMA Arbiter BIU Control Data Cache 512B Timing/ Interface Control Rd/Wr SysClk 2905 drw 01 Ctrl Figure 1. R3041 Block Diagram RISController, R3041, R3051, R3052, R3081, ORION, IDT/sim, and IDT/kit are trad...
IDT79R3051
manufacturer
Integrated Device
RISControllers
Languages Clk2xIn Clock Generator Unit Master Pipeline Control System Control Coprocessor Exception/Control Registers Memory Management Registers BrCond(3:0) Integer CPU Core General Registers (32 x 32) ALU Shifter Int(5:0) Translation Lookaside Buffer (64 entries) Mult/Div Unit Address Adder PC Control Virtual Address 32 Physical Address Bus Instruction Cache (8kB/4kB) Data Bus Bus Interface Unit 4-deep Write Buffer 4-deep Read Buffer DMA Arbiter Data Cache (2kB) 32 BIU Control Address/ Data DMA Ctrl Rd/Wr Ctrl SysClk 2874 drw 01 Figure 1. R3051 Family Block Diagram The IDT logo is a registered trademark, and RISChipset, RISController, R3041, R3051, R3052, R3071, R3081, ...
IDT79R3051E
manufacturer
Integrated Device
RISControllers
Languages Clk2xIn Clock Generator Unit Master Pipeline Control System Control Coprocessor Exception/Control Registers Memory Management Registers BrCond(3:0) Integer CPU Core General Registers (32 x 32) ALU Shifter Int(5:0) Translation Lookaside Buffer (64 entries) Mult/Div Unit Address Adder PC Control Virtual Address 32 Physical Address Bus Instruction Cache (8kB/4kB) Data Bus Bus Interface Unit 4-deep Write Buffer 4-deep Read Buffer DMA Arbiter Data Cache (2kB) 32 BIU Control Address/ Data DMA Ctrl Rd/Wr Ctrl SysClk 2874 drw 01 Figure 1. R3051 Family Block Diagram The IDT logo is a registered trademark, and RISChipset, RISController, R3041, R3051, R3052, R3071, R3081, ...
IDT79R3052
manufacturer
Integrated Device
RISControllers
Languages Clk2xIn Clock Generator Unit Master Pipeline Control System Control Coprocessor Exception/Control Registers Memory Management Registers BrCond(3:0) Integer CPU Core General Registers (32 x 32) ALU Shifter Int(5:0) Translation Lookaside Buffer (64 entries) Mult/Div Unit Address Adder PC Control Virtual Address 32 Physical Address Bus Instruction Cache (8kB/4kB) Data Bus Bus Interface Unit 4-deep Write Buffer 4-deep Read Buffer DMA Arbiter Data Cache (2kB) 32 BIU Control Address/ Data DMA Ctrl Rd/Wr Ctrl SysClk 2874 drw 01 Figure 1. R3051 Family Block Diagram The IDT logo is a registered trademark, and RISChipset, RISController, R3041, R3051, R3052, R3071, R3081, ...
IDT79R3052E
manufacturer
Integrated Device
RISControllers
Languages Clk2xIn Clock Generator Unit Master Pipeline Control System Control Coprocessor Exception/Control Registers Memory Management Registers BrCond(3:0) Integer CPU Core General Registers (32 x 32) ALU Shifter Int(5:0) Translation Lookaside Buffer (64 entries) Mult/Div Unit Address Adder PC Control Virtual Address 32 Physical Address Bus Instruction Cache (8kB/4kB) Data Bus Bus Interface Unit 4-deep Write Buffer 4-deep Read Buffer DMA Arbiter Data Cache (2kB) 32 BIU Control Address/ Data DMA Ctrl Rd/Wr Ctrl SysClk 2874 drw 01 Figure 1. R3051 Family Block Diagram The IDT logo is a registered trademark, and RISChipset, RISController, R3041, R3051, R3052, R3071, R3081, ...
IDT79R3081E
manufacturer
Integrated Device
RISController with FPA
of this processor. • The R3051, which incorporates 4kB of instruction cache and 2kB of data cache, but omits the TLB, and instead uses a simpler virtual to physical address mapping. • The R3081E, which incorporates a 16kB instruction cache, a 4kB data cache, and full function memory management unit (MMU) including 64-entry fully associative Translation Lookaside Buffer (TLB). The cache on the R3081E is user configurable to an 8kB Instruction Cache and 8kB Data Cache. • The R3081, which incorporates a 16kB instruction cache, a 4kB data cache, but uses the simpler memory mapping of the R3051/52, and thus omits the TLB. The cache on the R3081 is user configurable to an 8kB Instruction Cache an...




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